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Tech Thought #1 Innovations Beyond HBM in Memory Technology Exciting advancements are on the horizon beyond HBM in memory technology. HBM3 is poised to elevate bandwidth and capacity for demanding applications, while Memory-Class Storage (MCS) merges memory and storage features for enhanced speed and capacity. Persistent Memory (PMEM) offers a blend of DRAM-like performance and storage durability, propelling innovation in data processing efficiency. Furthermore, breakthroughs in 3D integration, like 3D NAND and 3D DRAM, promise heightened storage density and performance. Neuromorphic memory, inspired by neural networks, and Quantum memory, harnessing quantum states, hold the potential to revolutionize speed and capacity in memory technology. Reconfigurable memory architectures are also set to adapt to diverse workloads, optimizing performance across various applications. These advancements collectively mark a significant leap forward in memory technology, paving the way for a future that goes beyond the capabilities of HBM. #MemoryArchitecture #3DMemories #HBM #SpintronicsAI

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HBM (High-Bandwidth Memory), which is based on DRAM products, is a crucial building block for data centers. The following article addresses some complex issues in building such products. https://lnkd.in/gSYcAxuN

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BREAKING:Nokia's Strategic Acquisition of Infinera: A Game-Changer for Optical Networks as two Optica Corporate Members merge. In a significant move to bolster its network infrastructure business, Nokia has announced its acquisition of optical networks company Infinera, valuing the deal at $2.3 billion. This acquisition marks Nokia's second major shake-up in its Networks Infrastructure division within a single day. Nokia anticipates that the acquisition of Infinera will be a crucial driver towards achieving a double-digit operating margin for its Optical Networks business, which is one of three units in the revamped Networks Infrastructure division. The deal is expected to enhance Nokia's operations in North America, a region that underperformed in Q1. The acquisition offer stands at a 28% premium on Infinera's closing share price as of June 26, comprising at least 70% in cash and up to 30% in stock. Nokia emphasized that 60% of Infinera's revenue is generated from North America, with the acquisition expected to strengthen Nokia's position in the optical sector across APAC, EMEA, and Latin America. Pekka Lundmark, President and CEO of Nokia, remarked, "Now is the right time to take a compelling inorganic step to grow our optical capabilities, following our commitment to organic growth in 2021. The combined businesses have a strong strategic fit given their highly complementary customer, geographic, and technology profiles." Federico Guillén Moñino, President of Network Infrastructure at Nokia, added, "We have long respected Infinera as a competitor, but now we find the logic of combination irresistible." Nokia projects that the acquisition will expand the scale of its Optical Networks business by 75%, providing opportunities to accelerate product development and enhance its competitive edge. Key benefits expected include an expanded digital signal processor development team, expertise in silicon photonics, indium phosphide-based semiconductor materials, and advanced photonic integrated circuit technology. The acquisition is slated to close in the first half of 2025, pending approval from Infinera shareholders and regulatory authorities. With all this in mind watch Light Reading Video analyst Sterling Perrin and Infinera CEO David Heard discussing at the recent OFC Conference how the AI traffic boom is already driving optics in data center interconnect, subsea and terrestrial telecom networks, and also open new opportunities for Infinera’s chips inside the data center itself. Interesting numbers in that interview. https://lnkd.in/dKBz57Pa

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Tackling Data Retention in SSDs (by Anil Burra from Intelligent Memory) 🤩 "SSDs have conquered the market due to their speed, durability, energy efficiency, and small form factor. However, write endurance and data retention are concerns in #embedded and #industrial applications, especially as the technology moves to ever smaller nodes." (Anil Burra) With the scaling of #NAND #flash #technology to higher densities (e.g., Triple-Level-Cell or Quad Level-Cell) and smaller process nodes, data retention becomes more challenging due to increased cell-to-cell interference and reduced margins for charge storage. Therefore, newer #technologies may have shorter specified data retention periods compared to older, more robust #SLC (Single-Level-Cell) or #MLC (Mul ti-Level-Cell) #NAND products. Two key factors affect data retention, the period over which #flashmemory can store #data without loss or corruption, in #NANDflash cells: program/erase (P/E) cycling and operating temperature. A very big thank you to Anil Burra from Intelligent Memory for this insightful article via Electronic Specifier Ltd with more background and insights via the link below 💡🙏👇 - A very good read to an important TOPIC 🤩 https://lnkd.in/eqdH7-N2 #semiconductorindustry #semiconductormanufacturing #innovation #it #ai #ssd #datastorage #automotiveindustry #embeddedsystems #ic #computer #computing #iot #memory #chip #chips #technology #tech

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SK hynix wins large order for #HBM from Broadcom 💡 US #chip firm set to compete with NVIDIA South Korean memory chip giant SK Hynix has won a large order to supply high-bandwidth memory (HBM) to #Broadcom, TheElec has learned. The US #chip giant will procure the #memory #chips from #SKHynix to install on the #AIcomputing chip of a #BigTech company, sources said. SK Hynix is expected to supply the chip in the second half of next year. Broadcom actively approached the South Korean memory chip giant, the largest #HBM supplier in the world, to procure verified HBMs, the sources also said.SK Hynix will now surely adjust its #DRAM production capacity projection as it now suppliers HBM to both Nvidia and Broadcom. It is currently supplies the majority of HBM used by Nvidia for their AI accelerators. The South Korean firm aimed to expand its 1b DRAM, which is used as the core die in its HBM, production capacity to 140,000 to 150,000 300mm wafers next year. But with the new Broadcom deal, this is expected to increase to 160,000 to 170,000 300mm #wafers. Thanks again to Seonhaeng Lee and TheElec for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/et6E4wxF #semiconductorindustry #semiconductormanufacturing #tech #it #ic #computer #datacenter #computer #computing #hpc #chip #server

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Ampere announces 256-core 3nm #CPU, unveils partnership with Qualcomm 💡 Also looking at #chiplets, integration of third-party #IP Ampere Computing introduced its roadmap for the coming years, including new #CPUs and collaborations with third parties. In particular, the company said it would launch its all-new 256-core AmpereOne #processor next year, made on TSMC's N3 process #technology. Also, Ampere is teaming up with Qualcomm to build #AI inference #servers with the company's accelerators. Apparently, Huawei is also looking at integrating third-party UCIe-compatible #chiplets into its own platforms. Ampere has begun shipping 192-core AmpereOne processors with an eight-channel DDR5 memory subsystem it introduced a year ago. Later this year, the company plans to introduce 192-core AmpereOne CPUs with a 12-channel DDR5 memory subsystem, requiring a brand-new platform. Thanks again to Anton Shilov and Tom's Hardware for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/e6kMBR2Q #semiconductorindustry #semiconductors #semiconductor #tech #cpu #it #ic #semiconductormanufacturing #technology #chip #foundry #ai

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🔍It’s no mystery: there's no #AI without #hardware. As AI continues to help solve great mysteries from the ocean to space, here’s one I can help solve: custom chip #tech is mission-critical for the #future of AI. Unpack more insights in #ConnectingAI: https://lnkd.in/gw3jBcuJ #artificialintelligence #machinelearning

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#Memory Industry Revenue Expected to Reach Record High in 2025 Due to Increasing Average Prices and the Rise of #HBM and QLC, Says TrendForce Corporation 💡 TrendForce 集邦科技’s latest report on the memory industry reveals that #DRAM and #NAND #Flash revenues are expected to see significant increases of 75% and 77%, respectively, in 2024, driven by increased bit demand, an improved supply-demand structure, and the rise of high-value products like #HBM. Furthermore, industry revenues are projected to continue growing in 2025, with DRAM expected to increase by 51% and #NANDFlash by 29%, reaching record highs. This growth is anticipated to revive capital expenditures and boost demand for upstream raw materials, although it will also increase cost pressure for memory buyers. Thanks again to TrendForce Corporation for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eQufNZQg #semiconductorindustry #semiconductors #semiconductor #technology #tech #chip #chips #ai #aiot #consumerelectronics #datacenter #it #ic #chips #artificialintelligence #samsung #micron #skhynix #kioxia #nanya #westerndigital #winbond #japan #usa #southkorea #taiwan #china #it

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Great article with insights by Bernard Murphy at SemiWiki.com, "Arteris Frames Network-On-Chip Topologies in the Car." "... while there is plenty of complexity in evolving car architectures and the consequent impact on subsystem chip/chiplet designs, connected on-chip through both coherent and non-coherent networks, the intent behind these systems is quite clear. We just need to start thinking about total car system architecture rather than individual chip functions." #Arteris #NetworkOnChip #Automotive https://bit.ly/3UiKqls

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Both 5G/6G networks and LEO satellites leverage mmWave technology to achieve high data throughput and low latency, which are essential for applications like autonomous vehicles, IoT, augmented reality, and other advanced technologies.

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#SRAM scaling isn't dead after all — TSMC's 2nm process #tech claims major improvements 💡 SRAM scales again with GAA transistors! SRAM scaling came to a screeching halt with the last round of new process nodes, portending a dark future where on-#chip memories would become increasingly expensive. However, contrary to what we've seen in the past, #SRAM scaling apparently isn't dead after all. #TSMC has announced that its N2 process #technology (2nm-class) offers substantial improvements in performance, power efficiency, and area (PPA) compared to previous-generation nodes. However, there is one more thing that TSMC hasn't yet publicly discussed: considerably smaller SRAM cells and higher SRAM density (38 Mb/mm^2), which will have an impact on the costs and performance of next-generation #CPUs, #GPUs, and system-on-#chips.  TSMC's upcoming N2 node will debut with gate-all-around (#GAA) #nanosheet #transistors, promising a significant power reduction and a boost in performance and transistor density. Compared to the N3E fabrication technology, chips built on N2 are expected to reduce power usage by 25% to 30% (at equivalent transistor count and frequency), boost performance by 10% to 15% (with the same transistor count and power), and achieve a 15% increase in transistor density (maintaining the same speed and power). Thanks again to Anton Shilov and Tom's Hardware for the full article with more background and insights via the link below 🙏💡👇 https://lnkd.in/eb8jNwVC #semiconductorindustry #semiconductors #semiconductor #tech #it #foundry #memory #innovation #semiconductormanufacturing #ic #ai

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We are bringing wireless audio into different level

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TSMC: Performance and Yields of 2nm on Track, Mass Production To Start In 2025 💡 In addition to revealing its roadmap and plans concerning its current leading-edge process technologies, #TSMC also shared progress of its N2 node as part of its Symposiums 2024. The company's first 2nm-class fabrication node, and predominantly featuring gate-all-around transistors, according to TSMC #N2 has almost achieved its target performance and yield goals, which places it on track to enter high-volume manufacturing in the second half of 2025. TSMC states that 'N2 development is well on track and #N2P is next.' In particular, gate-all-around nanosheet devices currently achieve over 90% of their expected performance, whereas yields of 256 Mb #SRAM (32 MB) devices already exceeds 80%, depending on the batch. All of this for a node that is over a year away from mass production. Meanwhile, average yield of a 256 Mb SRAM was around 70% as of March, 2024, up from around 35% in April, 2023. Device performance has also been improving with higher frequencies being achieved while keeping power consumption in check. Thanks again to Anton Shilov and AnandTech for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eHgpfX4k #semiconductormanufacturing #semiconductors #semiconductor #tech #technology #innovation #chip #chips #integratedcircuits #ic #foundry #taiwan #geopolitics #asml #thenetherlands #europe #euv #computer

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#HBM4 set to land sooner than expected 💡 Suppliers and JEDEC are bringing their HBM4 plans forward as they suspect the forecasted Gen #AI boom means incoming NVIDIA GPUs will need it sooner. High bandwidth memory (#HBM) bypasses #X86 socket-connected #DRAM capacity and bandwidth limits by having #memory dies stacked on top of a logic layer, with interconnecting TSV channels, all linked to a #GPU via an interposer component providing higher bandwidth than X86 sockets. The Joint Electron Device Engineering Council (JEDEC) confirms and issues HBM standards, with the current one being its fifth, HBM3E (extended). JEDEC has said it will issue a completed HBM4 spec by the end of this year – just few months ago the schedule was for a 2025 delivery. Preliminary HBM4 characteristics are emerging already. Thanks again to Chris Mellor and Blocks and Files for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eZp_wyHB #semiconductorindustry #semiconductors #semiconductor #technology #tech #innovation #semiconductormanufacturing #it #chip #chips #ic #it

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#Samsung Tapes Out Its First 3nm #Smartphone #SoC, Gets A Boost From Synopsys Inc #AI-Enabled Tools 💡 This week Samsung Electronics and #Synopsys announced that Samsung has taped out its first mobile system-on-chip on Samsung Foundry's 3nm gate-all-around (GAA) process #technology. The announcement, coming from electronic design automation Synopsys, further notes that Samsung used the Synopsys.ai EDA suite to place-n-route the layout and verify design of the SoC, which in turn enabled higher performance. Samsung's unnamed high-performance mobile SoC relies on 'flagship' general-purpose #CPU and #GPU architectures as well as various #IP blocks from Synopsys. SoC designers used Synopsys.ai #EDA #software, including the Synopsys DSO.ai to fine-tune design and maximize yields as well as Synopsys Fusion Compiler RTL-to-GDSII solution to achieve higher performance, lower power, and optimize area (#PPA). And while the news that Samsung has developed a high-performance SoC using the Synopsys.ai suite is important, there is another, even more important dimension to this announcement: this means that Samsung has finally taped out an advanced smartphone application #processor on its cutting-edge #3nm ##GAAFET process. Thanks again to Anton Shilov and AnandTech for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eFhzFpXK #semiconductorindustry #semiconductors #semiconductor #chip #tech #it #ai #technology #foundry #semiconductormanufacturing #computing #ic

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At Broadcom, we enable today's Gen AI and deliver breakthrough technologies that will power tomorrow’s AI. A cluster of one million XPUs requires over 10 million high bandwidth links. Our SerDes roadmap provides the right foundation for our high performance XPUs and switches to drive power efficiency and scale for these large clusters. Here is our sixth video of the “Enabling AI” video series. #enablingAI #connectedbybroadcom

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Another innovative American semiconductor customer benefiting from our yieldHUB system. Re automation: "We needed to minimize and remove the low-value, low-impact work from our engineers."

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