Bipin Duggal

Good Opportunity In Chip Fabrication In India: Canon Canon India CEO Toshiaki Nomura said there is opportunity in India for its semiconductor lithography equipment required for chip fabrication. Read more at: https://lnkd.in/gq5kP3up

1

1 Comment

How will AI impact and enable the semiconductor industry and what jobs exist in semiconductor industry ? Listen to this brief chat with Data &AI expert Lekhana Reddy on salaries and more.. Where do you see AI impacting the semiconductor industry...would love to hear your thoughts below 👇🏾 https://lnkd.in/gb7rhvFH #semiconductorindustry #semiconductorsalaries #data hashtag #ai hashtag #genai

6

TSMC and Cadence are collaborating on next-generation #AI-driven flows, including the Cadence Cerebrus™ Intelligent Chip Explorer, for design productivity and optimization and Pegasus™ Verification System for Physical verification Signoff. #Cadence #Signoff #PhysicalVerification #Design #FoundryCertified “We have a distinguished track record collaborating with TSMC to deliver a broad set of innovations across EDA, packaging and IP to accelerate system and semiconductor design and enable customers to achieve aggressive time-to-market goals. These new certified design flows and standardized solutions allow customers to confidently design for TSMC advanced nodes and usher in improved design efficiency and technological advancements,” said Chin-Chi Teng, SVP and GM, R&D, Cadence. Read the press release here: https://ow.ly/bTym50REHjG

29

Grant, contain, and slap seems to be the Tech-moto for Biden admin's last full week of the year. Hello everyone, hope your holiday season is blessed with spirits, food & fun... the healthy stuff starts the 1st of Jan'25 :) Christmas started a couple of days early for tech giants TI, Samsung, and Amkor. Perhaps it was a last minute "now or never deal" because the current admin feels the Chips Act will be shifting to protect Mr. Musk's Tech vision endeavors and not necessarily the local tech manufacturing industry. Some experts say it’s just "executive end of year bonuses", other say it is not enough to really get the industry re-shored and efficiently working. One thing is clear regarding the Chips act, it will either die or get doubled down by Trump's administration... no in between. Regarding Chinese legacy chips. The Biden admin launched yet another US probe. This will surely involve more tariffs and legislation that will contain the use and purchase of the Chinese dominated commodity. Again, too little to late, especially for EU mkt dependence on CN legacy chips, but it had to be done before the end of the year because... who knows what will happen once Mr. Musk has a say on the matter after Jan 20th. Legacy chips are essential for EV manufacturing... you do the math. Finally, the TSMC, the only Corporation in the CHIPS ACT that has delivered and surpassed the chip fab output expectation, has been found liable for selling tech chips that ended up in Huawei phones. The result is more blacklisted customers. Not a terrible consequence for TSMC, but it set ups the stage for more government intervention. TSMC ruined the curve productions for all other companies subsidized by the CHIPS ACT. In other words, TSMC has put to shame everyone else. In one yr they build a humongous chip fab plant, hired local talent, and are now having the same output as their biggest plants in Taiwan. On the other hand, we have US companies with almost double the subsidize, that have yet to build 1 new chip, in a new plant. What do you think, will the new US administration use the same initiative of granting, holding, and slapping to re-shore tech manufacturing, or will they wallow and reshape the whole program? Hard to say. One thing is clear though, Mr. Musk will have a huge say on what will happen to the US tech manufacturing ind. in the next 4 yrs. Thank you for reading amigos y amigas. Have a lovely week, don't forget to grateful and remember to have fun!

3

1 Comment

#Samsung Tapes Out Its First 3nm #Smartphone #SoC, Gets A Boost From Synopsys Inc #AI-Enabled Tools 💡 This week Samsung Electronics and #Synopsys announced that Samsung has taped out its first mobile system-on-chip on Samsung Foundry's 3nm gate-all-around (GAA) process #technology. The announcement, coming from electronic design automation Synopsys, further notes that Samsung used the Synopsys.ai EDA suite to place-n-route the layout and verify design of the SoC, which in turn enabled higher performance. Samsung's unnamed high-performance mobile SoC relies on 'flagship' general-purpose #CPU and #GPU architectures as well as various #IP blocks from Synopsys. SoC designers used Synopsys.ai #EDA #software, including the Synopsys DSO.ai to fine-tune design and maximize yields as well as Synopsys Fusion Compiler RTL-to-GDSII solution to achieve higher performance, lower power, and optimize area (#PPA). And while the news that Samsung has developed a high-performance SoC using the Synopsys.ai suite is important, there is another, even more important dimension to this announcement: this means that Samsung has finally taped out an advanced smartphone application #processor on its cutting-edge #3nm ##GAAFET process. Thanks again to Anton Shilov and AnandTech for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eFhzFpXK #semiconductorindustry #semiconductors #semiconductor #chip #tech #it #ai #technology #foundry #semiconductormanufacturing #computing #ic

323

5 Comments

Great article with insights by Bernard Murphy at SemiWiki.com, "Arteris Frames Network-On-Chip Topologies in the Car." "... while there is plenty of complexity in evolving car architectures and the consequent impact on subsystem chip/chiplet designs, connected on-chip through both coherent and non-coherent networks, the intent behind these systems is quite clear. We just need to start thinking about total car system architecture rather than individual chip functions." #Arteris #NetworkOnChip #Automotive https://bit.ly/3UiKqls

25

What is needed to be a good "Analog Design Engineer" Focus: Have knowledge about various disciplines in this field, but you must be an expert in one of the slices of this field. Focus is required. Descipline: You need to be disciplined in this task, read lots of JSSCC, ISSCC, CICC, TCAS-I, TCAS-II, ASSCC, ESSCC papers and understand. Quality matters not quantity: Analog tasks and teams demand quality, you can't finish tasks by putting more headcount. Start designing from first principles. Some of the great circuits have few transistors (5-8) interconnected in brilliant fashion. Love what you do: Do not just do it for the sake of social pride! Analog Design is both an Art and Science. Art is all about creativity and science is all about insight. Analog design needs both. What technical skills you must master? Analog field can be broadly classified into 3 segments: (1) RF Design; RF designers are from Mars, where you design wireless circuits like LNAs (Low Noise Amplifiers), PAs (Power amplifiers), mixers, oscillators, PLLs etc. This is where passive components are used widely. (2) Baseband signal processing analog; where you design broadband analog circuits. These circuits usually comprise of interfaces like high speed SerDes, data converters, precision op-amps, filters, band gap reference circuits, oscillators, PLLs etc.. (3) Power management; focus on design of power management IPs like voltage regulators, DC-DC converters, band-gap circuits, LDO regulators, battery chargers etc.. You need to define your slice & get real world practical skills, not just theoretical knowledge. You must be familiar with block level designs as well as top level integration to effectively deliver the design as an IP (Intellectual property block) What good analog designer must know thoroughly? (1) Basics of electronics (2) Small signal analysis (3) Current references & voltage references (4) Single stage & multistage amplifiers (5) Op-amps & OTAs (6) Frequency response of amplifiers (7) Stability analysis of amplifiers (8) Noise analysis (9) Some device physics knowledge (10 Knowledge of spice simulator tool & techniques to perform analog and mixed signal circuit simulations (11) Analog layout design; Learn how to do systematic layout, symmetry requirements, common centroid & inter-digitating techniques, off-set cancellation, noise prevention & floor planning of your design. Remember it takes time to become a really very good analog designer. You cannot be an expert in short span in analog design. In fact, you will never be an expert. Reference books: (1) Analog Integrated Circuit Design by David A. Johns and Ken Martin (2) Design of Analog CMOS Integrated Circuits by Dr Behzad Razavi (3) Analog Design Essentials by Dr Willy Sansen (4) CMOS Circuit Design, Layout & Simulation by R. Jacob Baker (5) The Art of Analog Layout by Alan Hastings Best wishes! "RF Designers are from Mars, Analog Designers are from Venus" - Pradeep Khannur

467

23 Comments

HBM (High-Bandwidth Memory), which is based on DRAM products, is a crucial building block for data centers. The following article addresses some complex issues in building such products. https://lnkd.in/gSYcAxuN

1

One Financial Ratio impresses in the Texas Instruments Q1-24 reporting. The CapEx to Revenue Ratio is 34% (share of revenues spent on CapEx). This is significantly higher than the full fab IDMs, having an average of 28%. TI is becoming more "FAB" than the Full Fabbers. TI reported Q1-24 in line with expectations. It was another tough quarter, down 16.4% annually and 10.2% sequentially. #TI #IDM #Semiconductor #Chipsact https://lnkd.in/dTG7bU29

73

Tessolve, a leading semiconductor engineering solutions provider, has announced a definitive agreement to acquire German chip design firm Dream Chip Technologies in a deal valued up to ₹400 crore. This acquisition strengthens Tessolve’s global footprint and enhances its capabilities in delivering end-to-end, turnkey design solutions for advanced chips, particularly in System on Chip (SoC) applications across the AI, automotive, data center, and industrial sectors. As part of this acquisition, Tessolve will add four new delivery centers in Germany and the Netherlands, including a specialized Advanced Driver Assistance Systems (ADAS) and imaging center of excellence. Srini Chinamilli, Tessolve’s CEO, highlighted that this deal positions Tessolve among the few global design firms with comprehensive capabilities to tackle complex ASIC design projects. Jens Benndorf, CEO of Dream Chip, noted that the combined strengths of Dream Chip’s design IP and Tessolve’s established services will enable fully integrated solutions, from chip architecture to post-silicon testing and supply chain management. This collaboration aims to drive innovation, especially in camera-based and AI-driven ASIC applications. In parallel, reports indicate that Hero Electronix, a key stakeholder in Tessolve, may sell a 25-30% stake in the company, though Hero remains committed as a long-term majority shareholder. Thanks again to The Economic Times for the full article with more background and insights click the source link in the comments below 💡 🙏👇 #Semiconductors #ChipDesign #Acquisition #TechInnovation #AI #ADAS #AutomotiveTech #SoC #ASIC #DataCenter #SemiconductorIndustry #Tessolve #DreamChip

247

3 Comments

#Indian #PC Market Grew 7.1% YoY with 3.39 Million Units Shipped in 2Q2024, says IDC 💡 India’s traditional PC market (inclusive of #desktops, #notebooks, and #workstations) shipped 3.39 million units in 2Q2024, up 7.1% year-over-year (YoY), according to recent #data from the International Data Corporation  (IDC) Worldwide Quarterly Personal #Computing Device Tracker. All 3 categories - desktop, notebook, and workstation - grew by 5.9% YoY, 7.4% YoY and 12.4% YoY respectively. In 2Q2024, the consumer segment surged by 11.2% YoY as both online and offline channels saw good demand. The e-tail channel grew by a healthy 22.4% YoY. The commercial segment grew by 3.5% YoY fueled by an increased demand in the SMB and LB segments which grew by 12.4% YoY and 33.1% YoY, respectively. “This is the fourth consecutive quarter of YoY growth for the consumer segment,” said bharath shenoy, Research Manager, IDC India & South Asia. “Vendors kickstarted the back-to-school/ college campaigns, and good demand was seen in the e-tail channel as well during online sales. Vendors stocked the channel to prepare for upcoming Independence Day sales, which gave a healthy growth in consumer PC shipments” Thanks again to IDC for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eMxYD8_x #semiconductorindustry #semiconductors #semiconductor #technology #tech #informationtechnology #chip #computer #memory #dram #ssd

46

1 Comment

Don’t miss the Chiplets: Building the Future of SoCs virtual event on July 24 & 25! We’ll explore technical trends, market demand, and new application areas around chiplets concepts, challenges, technologies, and more with @EE Times and @Embedded.com. Hear from Cadence experts on the role of EDA companies in the chiplet transformation and how you can get a jumpstart in designing your own chiplets. https://ow.ly/tPUE50SBWkM

1

the capacitor makes this circuit a low pass filter, as the author suggested the then reduces noise but even if one doesn't necessarily need a low pass filter, it improves phase margin of the feedback configuration (or is high pass in feedback) - very useful for marginally stable designs

3

Tech Thought #2 "The Crucial Role of TSVs in High Bandwidth Memory: Performance, Thermal, and Mechanical Insights" In High Bandwidth Memory (HBM3), analyzing Through-Silicon Vias (TSVs) involves several critical aspects. Electrical performance is a key area of focus, where TSV resistance, capacitance, and signal integrity are evaluated to ensure they meet performance requirements and prevent issues like noise and crosstalk. Thermal performance is also crucial; it's important to assess how well TSVs manage heat dissipation and handle thermal cycling to maintain reliability under varying temperatures. Mechanical reliability is examined through stress and strain analysis, as well as fatigue testing, to ensure TSVs can withstand mechanical forces and repeated thermal cycles without failing. The manufacturing process is another critical aspect. Ensuring the quality of TSV fabrication, including proper alignment, filling, and insulation, is essential, and defect monitoring is necessary to avoid performance issues. Design considerations involve optimizing TSV density and placement to balance performance, power consumption, and area, and incorporating redundancy techniques can enhance reliability. Testing and validation are fundamental to confirm that TSVs operate correctly and reliably over time. Lastly, compatibility and integration are examined to ensure TSVs work well with other components and interfaces within the HBM3 system and integrate effectively within the overall packaging. Addressing these aspects comprehensively ensures that TSVs in HBM3 systems perform optimally and maintain high reliability. #SpintronicsAI #HBM #TSV #Semiconductors #ReliabilityEngineering #FutureOfMemory #ChipDesign #ElectronicsEngineering  

21

𝑾𝒉𝒚 𝑺𝑻𝑴32 𝒆𝒗𝒂𝒍𝒖𝒂𝒕𝒊𝒐𝒏 𝒃𝒐𝒂𝒓𝒅 ?  I have a range of evaluation boards from all well known semiconductor companies including NxP , ST, Nuvoton, TI , Microchip, Broadcom, Nordic, NVIDIA etc. That was part of my investment. I got loaner boards from ST, NxP and Nuvoton. I used following parameters to decide evaluation board : 1: 𝘾𝙤𝙢𝙥𝙖𝙣𝙮 𝙝𝙞𝙨𝙩𝙤𝙧𝙮 I have used ST devices around 1998 as well. 2: 𝙍𝙤𝙖𝙙𝙢𝙖𝙥 : They have a range of products in various domains 3: 𝘾𝙤𝙨𝙩: It is most important factor and their boards are available in Arduino range as well. 4: 𝙀𝙘𝙤𝙨𝙮𝙨𝙩𝙚𝙢 : They have a variety of tools for Pin multiplexing, Flash programming, Debugging and even for AI. 5: 𝙎𝙪𝙥𝙥𝙤𝙧𝙩 :  I never had issue in contacting ST Marketing , Development , FAE and distributor FAEs . In fact , now my student is also supporting ST devices in India. I was invited for a combined session with faculty as well. 6: 𝙅𝙤𝙗 𝙤𝙥𝙥𝙤𝙧𝙩𝙪𝙣𝙞𝙩𝙞𝙚𝙨 : Since STM32 is based on ARM and being widely used in India. It increases your possibility to get job. Here is outcome of my experience with ST device. This week was little bit interesting in embedded system live sessions. 1: Enabled one US based student in the STM32 evaluation board which I never used. It was done in live session. We supported multiple devices in past but it was instant support over live session. 2: Yesterday also another US based student shared board over camera. We started with default HAL project to do sanity check. First surprise was warning " Obsolete board" . We ignored and continued . Next surprise was "Insufficient flash memory" even with default configuration. This was because it had enabled all peripherals. I asked student to put while(1); in the beginning. Linker was kind enough to discard all other code and we could reach at main() at least. This was simple but important for student to move ahead. Both above students are working professionals in US and joined Embedkari for a refresh cycle. For joining Embedkari, no shubh muhurt is required because every moment is part of God's creation 😀 ... Join anytime . and #salarybadhao #microcontroller #microcontrollers #embedded #embeddedsystem #embeddedlinux #embeddedc #freertos #firmware #firmwareengineer #firmwarejobs #devicedriver #softwareengineers #electronics #embeddedjobs #embeddedsystems #embeddedengineer #embedkari #opentowork #freshers #stm32

8

Despite Intel's woes, the U.S. remains the revenue leader of the semiconductor industry https://lnkd.in/djwM4Ti6 US doesn't have any major Fabs, even Intel does most of its production in Ireland. US has even less share of packaging and testing and yet US is the revenue leader of the semiconductor industry, and not just now, for decades this is true. this should be a lesson to governments around the world. Vietnam for example is rightly focusing on fabless companies more than on manufacturing

10

1 Comment

𝐑𝐞𝐝𝐇𝐚𝐰𝐤-𝐒𝐂 𝐒𝐢𝐠𝐦𝐚𝐃𝐕𝐃 is a groundbreaking innovation in EDA, redefining how chip designers approach power integrity signoff. This once-in-a-decade technology captured significant attention from investors and chip designers alike at this year’s Design Automation Conference (DAC). Industry leaders like 𝐍𝐯𝐢𝐝𝐢𝐚, 𝐌𝐢𝐜𝐫𝐨𝐬𝐨𝐟𝐭, 𝐒𝐓, 𝐚𝐧𝐝 𝐔𝐍𝐈𝐒𝐎𝐂 shared success stories, showcasing how SigmaDVD has helped them achieve optimal power, performance, and area (PPA). One of the standout moments was a panel discussion hosted by our VP and Head of R&D, Murat Becer, alongside industry experts like Chip Stratakos (ex-MSFT) and Mohit Jain (Qualcomm). The session was a deep dive into the future of chip design with SigmaDVD, and the video is now available on our YouTube channel. I highly recommend every chip designer watch this discussion to discover the future of power integrity signoff! 🔗 #EDA #ChipDesign #PowerIntegrity #Innovation #DAC2023 #RedHawkSC #SigmaDVD

173

5 Comments

Terrific article in Nikkei Asia about EdgeCortix's innovative & efficient approach to delivering AI inference at the edge. Worth a read.

3