Fred Chong

By successfully implementing a Variational Quantum Eigensolver (VQE) in a 16-dimensional photonic system, the research highlights the potential of qudit-based quantum computing for practical applications, such as drug development, battery improvement and solving complex challenges like climate modeling. https://lnkd.in/eZMB4XHX https://lnkd.in/e-WMbGgH #technology #tech #innovation #business #engineering #technews #science #software #huawei #gadgets #design #electronics #apple #programming #android #coding #security #samsung #ai #smartphone #cybersecurity #education #computer #mathematics #compositivelogic #pro #marketing #technologynews #artificialintelligence #math #uni #student #college #phd #research #quantumcomputing #quantum #quantumphysics #quantummechanics #physics #quantumentanglement #technology #quantumcomputer #artificialintelligence #ai #China #machinelearning #computerscience #tesla #nasa #dwave #cern #maths #innovation #settheory #college #it #quantumtechnology #datascience #cryptocurrency #mit #vision #blockchain #sustainability #it #computerscience #logic #critical #thinking #theoreticalphysics #stanfordphysics #data #finance

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📣 The IEEE Transactions on Very Large Scale Integration (VLSI) Systems is proud to recognize one of its Best Associate Editors of 2023, CHIRN CHYE BOON. Our Associate Editors' contributions are instrumental in maintaining the journal's industry-leading standards for publishing impactful research. What makes a research paper stand out in the field of VLSI? Associate Editor Chirn Chye Boon shares his insights! 👇 Q: As an Associate Editor, you play a vital role in maintaining the high quality of the journal. What advice would you give to researchers who are submitting papers to the IEEE Transactions on VLSI Systems for the first time? A: Your paper could make a difference in the world’s technical advancement, thus making our world a better and more comfortable place for all. Do explain your work as best as you can and verify your work so that it leaves no doubt on its merits. Q: The field of VLSI is constantly evolving. In your opinion, how has the role of the Associate Editor changed over the years to keep pace with these advancements? A: Associate Editor works most efficiently only when there are many expert reviewers willing to help to perform the review. The success on performing the role of Associate Editor owes deeply to these capable and selfless reviewers, I want to say a “Big Thank You! “, for their great help and support. Q: Beyond technical merit, what are some of the key qualities you look for when evaluating a paper for publication in the IEEE Transactions on VLSI Systems? A: To put it simply, a clear, cohesive discussion of the work done, complete with proper verifications and detail comparisons with the state-of-the-art works is rudimental for a successful paper. Thank you for your contribution to the IEEE Transactions on Very Large Scale Integration (VLSI) Systems! #TVLSI #BestAssociateEditor #VLSI

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We encourage you to delve into the recently published paper "StrideHD: A Binary Hyperdimensional Computing System Utilizing Window Striding for Image Classification". 📝 Authored by: Dehua Liang; Jun Shiomi; Noriyuki Miura; Hiromitsu Awano IEEE Open Journal of Circuits and Systems (Volume: 5) In this work, the authors propose a novel HDC system: StrideHD. The uniqueness of StrideHD is to capture the critical features utilizing window striding method and organize the HDC architecture in a distributed way. 🔗 Read more on IEEE Xplore here: https://loom.ly/oTorzVM #OJCAS #OA #OpenAccess #PaperHighlight

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This paper develops #Cooperative #Federated unsupervised #Contrastive #Learning (#CF-#CL) to facilitate #Federated #learning (#FL) across edge devices with unlabeled datasets. CF-CL employs local device cooperation where either explicit (i.e., raw data) or implicit (i.e., embeddings) information is exchanged through #device-#to-#device (#D2D) communications to improve local diversity. Specifically, the authors introduce a #smart #information #push-#pull methodology for data/embedding exchange tailored to FL settings with either soft or strict data privacy restrictions. Information sharing is conducted through a #probabilistic #importance #sampling #technique at receivers leveraging a carefully crafted reserve dataset provided by transmitters.----Satyavrat Wagle, Seyyedali Hosseinalipour (Ali Alipour), Naji Khosravan, Christopher Brinton More details can be found at this link: https://lnkd.in/ghBxdR95

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The next honorable mention for the 2023 IEEE Transactions on #Robotics King-Sun Fu Memorial Best Paper Award is a paper we shared several months ago. Paper title: Kinegami: Algorithmic Design of Compliant Kinematic Chains From Tubular Origami Authors: Wei-Hsi Chen , Woohyeok Yang, Lucien Peach, Daniel E. Koditschek GRASP, and Cynthia Sung Paper link: https://lnkd.in/ggRQ7cQf Video caption: The supplemental video presents the introduction, fabrication, and application of a catalog of tubular origami modules and their compositions. It also shows an animated description of the "Kinegami" algorithm and includes a demonstration of an actuated Kinegami catapult. #RobotKinematics #Actuators #OrigamiRobot

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Exciting news! Submit your research at the HUBEDA workshop!

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC): This work analyzes the nonidealities for a resistive in-memory compute (IMC) architecture and provides important insights into the fundamental limits of compute for resistive architectures. https://bit.ly/4dpWMzI

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#Resistive #memory #devices exhibit rich dynamics and enable efficient computations like stateful logic, temporal processing, and analog matrix computing. Their #nonvolatile #switching and #crosspoint #architecture can overcome the von Neumann bottleneck and provide parallelism, notably accelerating matrix-vector multiplication in #neuralnetworks. Prof. Zhong Sun, Prof. Yuchao Yang and colleagues from Peking University demonstrate that a passive #resistive #switching #circuit, represented as an #attractor #network model, provides high-capacity, compact and efficient solution for #associative #memory. Now out 👉 #naturecommunications Nature Portfolio

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In this paper, George Mason University researchers Sanket Shukla and Sai Manoj P D propose an ML framework that efficiently harvests kinetic energy and performs energy-aware early exits with memory-optimized runtime checkpointing on edge devices like the Nano 33 BLE Sense.

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Learn IEEE The Institute profile of Lynn Conway codeveloper of VLSI, who died on 9 June at the age of 86. The #IEEE Fellow's process revolutionized #microchip design. https://lnkd.in/g4nY6hPT

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Our #icra2024 paper is now available from #ieee dl. We proposed a new Inverse Reinforcement Learning based method for hand trajectory prediction. Mukund Mitra Gyanig K. Partha Pratim Chakrabarti

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Thrilled to share that HyperAccel has published a practical research paper in IEEE Micro!   💡 Learn about our preliminary LLM Processing Unit (LPU*) IP on our road to ASIC. 💡 Learn about our HyperDex software stack that seamlessly integrates HuggingFace models to our hardware with programmability and robustness on par with CUDA. 💡 Learn about how our LPU IP achieves 2x raw performance advantage over NVIDIA H100 under similar specifications.   We headline our LPU in IEEE Micro Special Issue on Contemporary Industry Products alongside the latest and greatest technology from AMD, Intel, Microsoft, Meta, Synopsys, IBM, Arm, SK Hynix, Alibaba, and other global industries and research institutions. *Previously called "Latency" Processing Unit 📑 The paper is available in the arXiv: https://lnkd.in/gb5qGxGx   📑 The paper is also available at IEEE Micro - Early Access: https://lnkd.in/gEvC7_Bd

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📢 New User Experiment Blog: July 2024 Out Now! 🖥️🔬 Exciting news! Our latest User Experiment blog is now live, featuring groundbreaking research on Multi-Tiered Memory Management by Prof. Dong Li and his team at UC Merced. Highlights: • Innovative approach to managing large, multi-tiered memory systems • Real-world experiment using Chameleon's four-tier memory nodes • Insights on overcoming challenges in HPC memory profiling and migration Dive into the world of high-performance computing and discover how Chameleon is powering cutting-edge research. Read the full blog post here: https://lnkd.in/gzU4EQh5 #ChameleonCloud #UserExperiment #HPC #ResearchComputing

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Quantum Circuits Inc (QCI), founded in 2015 by Robert Schoelkopf, Michel Devoret, and Luigi Frunzio from Yale University, is at the forefront of quantum computing technology. The company aims to develop, manufacture, and sell practical quantum computers based on superconducting devices, leveraging the founders' pioneering work in circuit quantum electrodynamics. QCI has made significant strides in the highly competitive quantum computing field, securing over $18 million in funding from investors like Sequoia Capital and Canaan Partners. The company's approach focuses on modular quantum computing architecture, which could potentially allow for more scalable and fault-tolerant quantum systems. Despite the promise of their technology, QCI faces challenges common to the quantum computing industry, including the need for extreme cooling, maintaining quantum coherence, and demonstrating practical advantages over classical computers. The key lesson from QCI's journey is the importance of translating cutting-edge academic research into commercially viable technology, highlighting the potential for university spin-offs to drive innovation in emerging fields.

Delve into the recently published paper "Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error". Authored by: Julian Büchel; Athanasios Vasilopoulos; Benedikt Kersting; Corey Lammie; Kevin Brew; Timothy Philip; Nicole Saulnier; Vijay Narayanan; Manuel Le Gallo; Abu Sebastian 📝 Volume: 13, Issue: 4, December 2023 In this paper, the authors present a method where, instead of programming in a device-by-device manner, we directly minimize the matrix-vector multiplication (MVM) error using only random inputs. This is achieved by iteratively updating the devices using the gradient of a loss function, which is defined as the MVM error. By doing so, we eliminate the need for single-device reads and consistently achieve superior MVM accuracies. 🔗 Continue reading on IEEE Xplore: https://loom.ly/nAtA97Y #IEEE #IEEEXplore #JETCAS #CircuitsandSystems #graphicalabstract #ReadMore

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This paper by Anita Kumari Rao, Sandeep Sulakh and Deepa Sinha introduces Ω−(Zn), a family of interconnection networks based on a special set S in Zn, examining their structural properties, including #planarity and connectedness, and exploring relationships between derived #graphs and the spectrum of absorption #Cayleygraph and unitary addition Cayley graph. Read more here: https://lnkd.in/ehfKRSVK

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