Priyadarshini Panda

It’s been an honor working with Gil Weinberg! Thanks so much! This demo is from one of the chapters in my thesis on #AI driven raga agnostic automatic accompaniment for alapana (non-rhythmic improvisations) in South Indian Classical Music. Since the algorithm is raga agnostic, the system can accompany for any raga performed! More demos on a violin playing #robot coming soon! #MusicTechnology #MachineLearning #HumanRobotInteraction #HumanComputerInteraction #AutomaticAccompaniment

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Thrilled to share that HyperAccel has published a practical research paper in IEEE Micro!   💡 Learn about our preliminary LLM Processing Unit (LPU*) IP on our road to ASIC. 💡 Learn about our HyperDex software stack that seamlessly integrates HuggingFace models to our hardware with programmability and robustness on par with CUDA. 💡 Learn about how our LPU IP achieves 2x raw performance advantage over NVIDIA H100 under similar specifications.   We headline our LPU in IEEE Micro Special Issue on Contemporary Industry Products alongside the latest and greatest technology from AMD, Intel, Microsoft, Meta, Synopsys, IBM, Arm, SK Hynix, Alibaba, and other global industries and research institutions. *Previously called "Latency" Processing Unit 📑 The paper is available in the arXiv: https://lnkd.in/gb5qGxGx   📑 The paper is also available at IEEE Micro - Early Access: https://lnkd.in/gEvC7_Bd

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📢 New User Experiment Blog: July 2024 Out Now! 🖥️🔬 Exciting news! Our latest User Experiment blog is now live, featuring groundbreaking research on Multi-Tiered Memory Management by Prof. Dong Li and his team at UC Merced. Highlights: • Innovative approach to managing large, multi-tiered memory systems • Real-world experiment using Chameleon's four-tier memory nodes • Insights on overcoming challenges in HPC memory profiling and migration Dive into the world of high-performance computing and discover how Chameleon is powering cutting-edge research. Read the full blog post here: https://lnkd.in/gzU4EQh5 #ChameleonCloud #UserExperiment #HPC #ResearchComputing

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Senior Hannah Carroll in BME applied several machine learning models to images of retinas in order to score severity of diabetic retinopathy. To do this, she rapidly leveraged Pytorch and several computer vision deep learning neural net architectures this term in Deep Learning for Biomedical Engineering in UVM College of Engineering and Mathematical Sciences. GitHub: https://lnkd.in/gnrZkDY8

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📣 The IEEE Transactions on Very Large Scale Integration (VLSI) Systems is proud to recognize one of its Best Associate Editors of 2023, CHIRN CHYE BOON. Our Associate Editors' contributions are instrumental in maintaining the journal's industry-leading standards for publishing impactful research. What makes a research paper stand out in the field of VLSI? Associate Editor Chirn Chye Boon shares his insights! 👇 Q: As an Associate Editor, you play a vital role in maintaining the high quality of the journal. What advice would you give to researchers who are submitting papers to the IEEE Transactions on VLSI Systems for the first time? A: Your paper could make a difference in the world’s technical advancement, thus making our world a better and more comfortable place for all. Do explain your work as best as you can and verify your work so that it leaves no doubt on its merits. Q: The field of VLSI is constantly evolving. In your opinion, how has the role of the Associate Editor changed over the years to keep pace with these advancements? A: Associate Editor works most efficiently only when there are many expert reviewers willing to help to perform the review. The success on performing the role of Associate Editor owes deeply to these capable and selfless reviewers, I want to say a “Big Thank You! “, for their great help and support. Q: Beyond technical merit, what are some of the key qualities you look for when evaluating a paper for publication in the IEEE Transactions on VLSI Systems? A: To put it simply, a clear, cohesive discussion of the work done, complete with proper verifications and detail comparisons with the state-of-the-art works is rudimental for a successful paper. Thank you for your contribution to the IEEE Transactions on Very Large Scale Integration (VLSI) Systems! #TVLSI #BestAssociateEditor #VLSI

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Happy about our latest paper titled "Deduplicator: When Computation Reuse Meets Load Balancing at the Network Edge", which was recently accepted for publication by IFIP Networking 2024. All the props go to my senior Ph.D. student, Md. Washik Al Azad. This is the 9th (!) publication during his Ph.D., which is a substantial accomplishment for a systems student. The rest of his papers have been published at IEEE PerCom (best paper runner up award), the IEEE Internet of Things Journal (impact factor > 10), IEEE CLOUD, and the IEEE Wireless Communications Magazine (impact factor > 10), among other venues. In this paper, we explore whether we can achieve the contradictory in nature functions of load balancing and computation reuse at the network edge. To this end, we propose an edge middlebox, called the Deduplicator. Our experimental results demonstrate that we can facilitate computation reuse and distribute the load among edge servers at the same time. You can find a preprint of our paper on arXiv: https://lnkd.in/dkQqq9XM Our code is also available on GitHub: https://lnkd.in/dq3HXJSZ #research #cloudcomputing #edgecomputing #loadbalancing #distributedsystems #systems #computernetworks #middleboxes

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Our #icra2024 paper is now available from #ieee dl. We proposed a new Inverse Reinforcement Learning based method for hand trajectory prediction. Mukund Mitra Gyanig K. Partha Pratim Chakrabarti

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Great to see the newly announced Bamba-9B, an inference-efficient Hybrid Mamba2 model 🐍 trained by IBM, Princeton, CMU, and UIUC on completely open data used PyTorch FSDP to train these novel architecture models and they are integrating inference with vLLM, which recently joined the PyTorch Ecosystem.

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EMNLP 2024 results are out, we got in three papers, congrats to students :) First paper of many, Vatsal, Pranshu, Suyash, Janit, Kunal, Srija and Adnan, Congrats 🎉 🎊 🍾 🎈 Evaluating Concurrent Robustness of Language Models Across Diverse Challenge Sets (main) - Vatsal Gupta, PRANSHU PANDYA, Tushar Kataria, Vivek Gupta, Dan Roth tldr: make models robust on multiple adversarial challenge set simultaneously  arxiv: https://lnkd.in/ei-65Y6g Knowledge-Aware Reasoning over Multimodal Semi-structured Tables (finding) Suyash Vardhan Mathur, Jainit Bafna, Kunal Kartik, Harshita Khandelwal, Manish Shrivastava, Vivek Gupta, Mohit Bansal, Dan Roth tldr: introduce the novel task of reasoning on multimodal tabular data, text + images in a structure (first of a kind) arxiv: https://lnkd.in/e5ycusfn   Unraveling the Truth: Do LLMs really Understand Charts? A Deep Dive into Consistency and Robustness (finding) Srija Mukhopadhyay, Adnan Qidwai, Aparna Garimella, Pritika Ramu, Vivek Gupta, Dan Roth           tldr: VLM although seem very accurate on chart, are not all robust and consistent in performance arxiv: https://lnkd.in/eFFA-sVX We also got an workshop paper, at BlockBoxNLP 2024 @EMNLP, here the details Enhancing Question Answering on Charts Through Effective Pre-training Tasks Ashim Gupta, Vivek Gupta, Shuo Zhang, Yujie He, Ning Zhang , Shalin Shah, Ph.D. tldr: models is not robust & consistent on charts, can we use pre-training on simple auxiliary tasks to enhance model robustness arxiv: https://lnkd.in/egbRHm-4

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Researchers at CMU Introduce TriForce: A Hierarchical Speculative Decoding AI System that is Scalable to Long Sequence Generation Quick read: https://lnkd.in/gr_he4kw Researchers from Carnegie Mellon University and Meta AI (FAIR) Introduce TriForce, a hierarchical speculative decoding system designed for scalable long sequence generation. TriForce utilizes the original model weights and dynamic sparse KV cache via retrieval as a draft model, serving as an intermediate layer in the hierarchy. Maintaining the full cache allows for superior KV cache selection using retrieval-based drafting, characterized as lossless compared to eviction-based methods like StreamingLLM and H2O. The hierarchical system addresses dual memory bottlenecks, pairing a lightweight model with a StreamingLLM cache for initial speculations to reduce drafting latency and accelerate end-to-end inference. TriForce introduces a hierarchical speculative decoding system with retrieval-based KV cache selection. The hierarchical system addresses dual bottlenecks, enhancing speed-up. Retrieval-based drafting segments the KV cache, highlighting relevant information. Lightweight models with StreamingLLM cache accelerate initial speculations, reducing drafting latency. TriForce utilizes model weights and KV cache to enhance LLM inference speed for long sequences. The implementation utilizes Transformers, FlashAttention, and PyTorch CUDA graphs, maintaining full layer sparsity while minimizing kernel launching overhead. Paper: https://lnkd.in/ga45hspw Machine Learning Department at CMU

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#Resistive #memory #devices exhibit rich dynamics and enable efficient computations like stateful logic, temporal processing, and analog matrix computing. Their #nonvolatile #switching and #crosspoint #architecture can overcome the von Neumann bottleneck and provide parallelism, notably accelerating matrix-vector multiplication in #neuralnetworks. Prof. Zhong Sun, Prof. Yuchao Yang and colleagues from Peking University demonstrate that a passive #resistive #switching #circuit, represented as an #attractor #network model, provides high-capacity, compact and efficient solution for #associative #memory. Now out 👉 #naturecommunications Nature Portfolio

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC): This work analyzes the nonidealities for a resistive in-memory compute (IMC) architecture and provides important insights into the fundamental limits of compute for resistive architectures. https://bit.ly/4dpWMzI

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The paper (2020) by Jared Williard et al on ‘Integrating Physics-based modeling with machine learning’ makes for an insightful read. ⬇️ What they provide through this paper are the objectives of Physics-#ML integration, which clearly are: 👉 finding computationally inexpensive representations of more complex #models 👉 discovering governing equations 👉 solving PDEs 👉 uncertainty quantification 👉 #data generation Physics-based approaches for #data generation often rely on running physical simulations or experiments, which tend to be very time consuming. Also, they are restricted by what can be produced by only physics-based #models. Hence there is an increasing interest in deep learning #DL approaches. Neural network approaches like #GAN, #VAE learn #data distributions in unsupervised settings and have the potential to generate new #data beyond what could be produced by traditional approaches. The generative adversarial network #GAN is one #DL architecture that extracts representative latent embeddings from observed #data distributions; #DL methods are known to approximate distributions very well. The #data generated by capturing latent embeddings are similar to observed #data. The adversarial component of #GAN consists of a 2-part framework namely, generative network and discriminative network; the generator’s objective is to generate sample #data and the discriminator determines if the sample came from training/observed #data or the generator. The generative and discriminative networks thus compete against each other and a #GAN learns to generate new samples.

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Research papers we love 🔬 📄 Accelerated Band Offset Prediction in Semiconductor Interfaces with DFT and Deep Learning. 👥 Kamal Choudhary and Kevin F. Garrity. We introduce a computational framework to predict band offsets of semiconductor interfaces using density functional theory (DFT) and graph neural networks (GNN). As a first step, we benchmark DFT based work function and electron affinity values for surfaces against experimental data with accuracies of 0.29 eV and 0.39 eV. Similarly, we evaluate band offset values using independent unit (IU) and alternate slab junction (ASJ) models leading to accuracies of 0.45 eV and 0.22 eV respectively. During ASJ structure generation, we use Zur’s algorithm along with a unified GNN force-field to tackle the conformation challenges of interface design. At present, we have 300 surface work functions calculated with DFT, from which we can compute 44850 IU band offsets as well as 250 directly calculated ASJ band offsets. Finally, as the space of all possible heterojunctions is too large to simulate with DFT, we develop generalized GNN models to quickly predict band edges with an accuracy of 0.26 eV. We use such models to predict relevant quantities including ionization potentials, electron affinities, and IU-based band offsets. We establish simple rules using the above models to pre-screen potential semiconductor devices from a vast pool of nearly 1.4 trillion candidate interfaces. Read more: https://lnkd.in/di8SKqrg 🤔 What do you think about it? Share with us in the comments 👇 #materials #RnD #mat3ra #exabyteio #materialsscience #materialsdesign #materialsmodeling #science #technology

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🌟 Exciting News! 🌟 Join us for our new webinar series, "Understanding Reversibility: Edward Fredkin Memorial Lectures," organized by Cellular Automata India (CAI). This series pays tribute to the pioneer in reversible computing, Edward Fredkin, whom we lost on June 13, 2023. Our focus spans across various scientific disciplines, exploring the theme of Reversibility. Here's a glimpse of what to expect: 1. Logic Synthesis methods for reversible and quantum circuits by Susmita Sur-Kolay, ISI Kolkata 2. Time-reversal Symmetries in reversible Cellular Automata by Kenichi Morita, Hiroshima University, Japan 3. Exploring irreversibility in the macro-world by Pradeep Kumar Mohanty, IISER Kolkata 4. Asynchronism and Reversibility by Sukanta Das, IIEST Shibpur 5. Reversibility and Irreversibility in Cellular Automata and Physics, with insights from Stephen Wolfram, Wolfram Research 6. The gift of invertibility across math, physics, and cellular automata by Tommaso Toffoli, Boston University, USA 7. Negation, Absence, and Reversibility by Smita Sirker, JNU India Mark your calendars! 📅 🗓️ Every Saturday from April 27 to May 18, 2024 ⏰ 2:00 – 6:00 pm IST Join us on Google Meet: (https://lnkd.in/gF-4-VPJ) For detailed schedule, click here: (https://lnkd.in/ge3aUWvn) Don't miss out on this unique opportunity to engage in lively discussions with eminent speakers from diverse domains. Let's make this event a resounding success together! #CellularAutomataIndia #CAI #Reversibility #webinar #research #toffoligate #quantum #cellularautomata #wolfram #reversiblecomputing

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This paper by Anita Kumari Rao, Sandeep Sulakh and Deepa Sinha introduces Ω−(Zn), a family of interconnection networks based on a special set S in Zn, examining their structural properties, including #planarity and connectedness, and exploring relationships between derived #graphs and the spectrum of absorption #Cayleygraph and unitary addition Cayley graph. Read more here: https://lnkd.in/ehfKRSVK

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🌟Congratulations to Sudeep Pasricha for being elevated to IEEE Fellow! Sudeep is recognized for contributions to design and optimization of chip-scale communication architectures for manycore computing. Learn more: https://loom.ly/2cxg0Ts

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Here is our new paper accepted in Neurocomputing journal. SITU: Stochastic input encoding and weight update thresholding for efficient memristive neural network in-situ training The Analog-to-Digital Converter (ADC) sensing and conductance update are the most power-demanding processes in the in-situ training of memristive neural networks. In this work, we propose a new thresholded weight update method in conjunction with stochastic input encoding to reduce the ADC sensing requirement and weight updates. This leads to better power and area efficiency for simple neural network models developed in situ on memristive crossbars. This is an interesting research work by Xuening Dong and collaboration between University of Toronto, James Cook University , and York University. https://lnkd.in/gY4-GgtC

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