Marco Mezger’s Post

🚀 Apple x Broadcom: Revolutionizing AI! Apple is teaming up with Broadcom to create its first AI-focused server chip, code-named "Baltra", expected to roll out by 2026. 💡 This cutting-edge chip will use TSMC's advanced N3P process and aims to reduce reliance on Nvidia’s pricey GPUs. 🎯 📈 Broadcom shares soared 5% on the news, riding the AI boom wave. This partnership follows Apple’s success with its in-house M-series chips and a multi-billion-dollar 5G deal with Broadcom last year. 🔗 💰 With the custom chip market projected to hit $45B by 2028, Broadcom and Marvell are leading this tech revolution. 🌟 #AI #Apple #Broadcom #ChipInnovation #TechNews #GenerativeAI #AIChips #Nvidia #TSMC #Innovation #FutureTech #SiliconRevolution

🔗 The Semiconductor AI Supply Chain: Powering AI Innovation! 🚀 From the fabrication of ICs to delivering complete AI servers, the semiconductor supply chain is vital in enabling the rapid evolution of AI. This infographic breaks down the roles played by key players, from logic foundries like TSMC and Intel to the accelerators and CPU/GPU subsystems powered by NVIDIA, AMD, and Intel. Key highlights: - Logic silicon by TSMC, Samsung, Intel, and more - Memory solutions from Micron, SK Hynix, and Samsung - Accelerator subsystems from Broadcom, Marvell, and Qualcomm - Server manufacturing by Lenovo, Dell, and HPE This interconnected network drives AI in applications like supercomputing, enterprise, and consumer internet (think Meta and OpenAI), all the way to CSPs like Google, Microsoft, and Amazon. 🌐 The future of AI is powered by this intricate supply chain, and the impact on sovereign AI and custom server systems is only growing. The role of memory, logic, and subsystems is more crucial than ever! #Semiconductors #AI #AIInnovation #SupplyChain #VLSI #CPUs #GPUs #CloudComputing #AIAccelerators #AIInfrastructure

#Micron, #Intel Bring #MRDIMM Modules to Market Micron Technology’s latest memory offering is a collaboration with Intel to address memory-intensive data center applications like AI and high-performance computing (HPC). In a recent joint briefing with Intel, Micron presented its multiplexed rank dual inline memory modules (MRDIMMs), which the company said they are now sampling. Praveen Vaidyanathan, VP and GM of Micron’s Compute Products Group, said this first generation of MRDIMMs will enable customers to run increasingly demanding workloads with support for a wide capacity range from 32 GB to 256 GB in standard and tall form factors (TFF), which are suitable for high-performance 1U and 2U servers, and are compatible with Intel Xeon 6 processors. For applications requiring more than 128 GB of memory per DIMM slot, Vaidyanathan said Micron MRDIMMs outperform current TSV RDIMMs, while the TFF #modules feature an improved thermal design that reduces #DRAM temperatures by up to 20 degrees Celsius at the same power and airflow to enable more efficient cooling in the data center. Micron’s collaboration with Intel involved a great deal of design, development, testing and validation, Vaidyanathan added, and the development of the MRDIMM was driven by customer needs as they embrace Intel’s Xeon 6 #processor.

However, just as Intel had established dominance in the data center market, a new computing trend emerged—artificial intelligence (AI). AI tasks were a challenge for Intel's main chips, the central processing units (CPUs). CPUs were designed to be versatile, general-purpose workhorses, serving as the "brains" of computers and data centers. However, they weren't well-suited for AI's specific demands.

TSMC's N2 process has a major advantage over Intel's 18A: SRAM density #SRAM is hard to scale 💡 Given how SRAM-intensive modern designs are, SRAM cell size and density are major characteristics of new fabrication #technologies. Apparently, the SRAM density of Intel's 18A manufacturing process (1.8nm-class) is considerably lower than that of #TSMC's N2 (2nm-class), and is closer to TSMC's N3, according to the ISSCC 2025 Advance Program. Still, Intel's 18A could have other major advantages over N2. Intel Corporation's 18A fabrication process features a high-density SRAM bit cell size of 0.021 µm^2 (therefore achieving an SRAM density of approximately 31.8 Mb/mm^2), which is a major improvement compared to a high-density SRAM bit cell size of 0.024 µm^2 in #Intel 4, but aligns with what #TSMC's N3E and N5 offer. By contrast, TSMC's N2 #manufacturing #technology shrinks HD SRAM bit cell size to around 0.0175 µm^2, enabling SRAM density of 38 Mb/mm^2. Thanks again to Anton Shilov and Tom's Hardware for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/evGpYJZF #semiconductorindustry #semiconductors #semiconductor #tech #it #chip #chips #geopolitics #ai #datacenter #computing #computer #ic

I would ignore Intel Corporation 18A for a moment and just look at the density improvement from TSMC #N3 to #N3E to #N2. The improvement is barely 1.3x, probably not even in line with the wafer costs of N2 wafers vs N3. Some analog is also always required in the chip and that likely did opposite of scaling : it likely blew up in area. N3 to N2 will still be very good die to logic density improvements, lower power and better speed, but the overall advantage is likely to be small and probably not worth the wafer prices. what is not given here is N5 and N7 both of which had very similar SRAM density as N2. Moore's law is well and truly dead for a while (as Moore himself said : anything that improves exponentially must come to an end)

Intel Corporation has commenced high-volume production of its 3nm-class process technology, named Intel 3, at facilities in Oregon and Ireland. The new node promises higher performance and transistor density, supporting voltages of 1.2V for ultra-high-performance applications. It targets Intel's own products like the Xeon 6 processors, as well as foundry customers, with plans for further evolution. Intel 3 offers 18% higher performance at the same power and transistor density compared to its predecessor, Intel 4, and supports various metal stack options and library combinations for optimizing performance and cost. Future variants like Intel 3T and Intel 3-E are planned to cater to diverse application needs including AI/HPC and general-purpose computing. Follow Amanda Newman to stay up to date with technology. https://lnkd.in/e8PZnA5x

Intel Corporation’s Turnaround Hinges on This? Its First 18A #Chip in High-volume Makes Official Debut 💡 Amid an operational crisis, #Intel has abandoned its “5 Nodes in 4 Years” plan, shelving the Intel 20A process node to focus entirely on the more advanced Intel 18A. Now, there is finally good news regarding the 18A process. During the recent Enterprise Tech Tour in #Portland, Oregon, CEO Pat Gelsinger made the first public reveal of the Clearwater Forest #Xeon #server #processor, produced using the Intel 18A node. This #chip is a crucial element in determining whether Intel’s ambitious transformation plan will succeed, according to Tom's Hardware. The report highlights that Clearwater Forest is the first high-volume chip to be fabricated on the Intel 18A node—a process so pivotal that Gelsinger has effectively staked the entire company’s future on its success. Although the chip was showcased at the event, it won’t hit the market until next year. Thanks again to TrendForce Corporation for the full article with more background and insights via the link below 🙏💡👇 https://lnkd.in/e4zddreg #semiconductorindustry #semiconductormanufacturing #technology #it #tech #computer #chip #chips #ic #icdesign #tech #datacenter #ai

𝗜𝗻𝘁𝗲𝗹 𝗵𝗮𝘀 𝘀𝗮𝗶𝗱 𝘁𝗵𝗮𝘁 𝗶𝘁𝘀 𝟭𝟴𝗔 𝗻𝗼𝗱𝗲 𝗽𝗿𝗼𝗱𝘂𝗰𝘁𝗶𝗼𝗻 𝗶𝘀 𝗼𝗻 𝘁𝗿𝗮𝗰𝗸. 𝗘𝘅𝘁𝗲𝗿𝗻𝗮𝗹 𝗰𝘂𝘀𝘁𝗼𝗺𝗲𝗿𝘀 𝗮𝗿𝗲 𝗲𝘅𝗽𝗲𝗰𝘁𝗲𝗱 𝘁𝗼 𝗯𝗲𝗴𝗶𝗻 𝗽𝗿𝗼𝗱𝘂𝗰𝘁 𝘁𝗮𝗽𝗲-𝗼𝘂𝘁𝘀 𝗶𝗻 𝘁𝗵𝗲 𝗳𝗶𝗿𝘀𝘁 𝗵𝗮𝗹𝗳 𝗼𝗳 𝟮𝟬𝟮𝟱. This new technology promises enhanced scalability and efficiency, paving the way for advancements in AI computing. Matthew Walker from Electropages highlights two key features of Intel's 18A technology that will enable these improvements: • 𝗥𝗶𝗯𝗯𝗼𝗻𝗙𝗘𝗧: Gate-All-Around (GAA) transistors offer more precise control over current flow than the older FinFET technology. This leads to higher transistor density and improved power efficiency.    • 𝗣𝗼𝘄𝗲𝗿𝗩𝗶𝗮: This innovation relocates power delivery to the back of the chip, freeing up more space for signal wiring on the front. This arrangement allows for greater transistor density, enhancing performance without increasing power consumption.    To dig deeper, read Matthew's article in Electropages at https://lnkd.in/e5ndQj3e. #intel #18A #ribbonfet #powervia #AIchips #chipdesign #fabs

Can this new #optical #interconnect #chiplet #technology help Intel Corporation get back in the #AI race or is NVIDIA just to far ahead with its integrated stack (hardware, software, networking, etc.)? I think the real potential here is for Intel Corporation to create a #hybrid #open #architecture which allows this advanced #optical #interconnect #technology to pair with advanced #AI accelerators from Groq, Etched, Tenstorrent, Lightmatter, Esperanto Technologies, Inc, etc.. Curious on your thoughts. Post comments below.